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Logic Gates and Truth Table

Logic gate The digital circuit that can be analyzed with the help of Boolean algebra is called logic gate or logic circuit. A logic gate has two or more inputs but only one output.
 
There are primarily three logic gates namely the OR gate, the AND gate and the NOT gate.
 
Truth table The operation of a logic gate or circuit can be represented in a table which contains all possible inputs and their corresponding outputs is called the truth table. To write the truth table, we use binary digits 1 and 0.

OR gate

The OR gate has two inputs (A and B) and only one output (Y) (Fig. 43).
 
109258.png
Fig. 43
 
Boolean expression is Y = A + B and is read as “Y equals A OR B.
 
Realization of OR gate
 
109279.png
Fig. 44
 
  • A = 0, B = 0
     
    Both diodes D1 and D2 do not conduct and hence Y = 0.
  • A = 0, B = 1
     
    D1 does not conducts, D2 Conducts. Hence, Y = 1.
  • A = 1, B = 0
     
    D1 conducts, D2 does not conduct. Hence, Y = 1.
  • A = 1, B = 1
     
    Both D1 and D2 conduct. Hence, Y = 1.
Truth table for OR gate
 
A
B
Y = A+ B
0
0
0
0
1
1
1
0
1
1
1
1

AND gate

The AND gate has two inputs (A and B) and only one output (Y). Boolean expression Y = A · B is read as Y equals A AND B.
 
109293.png
Fig. 45
 
Realization of AND gate
 
109303.png
Fig. 46
  • A = 0, B = 0
     
    The voltage supply through R is forward biasing. Diodes D1 and D2 offer low resistance and voltage V would drop across R.
     
    Output voltage at Y = Voltage across diode = 0
  • A = 0, B = 1
     
    D1 conducts, D2 does not conduct.
     
    The out voltage at Y = the voltage across the diode (D1) = 0.
  • A = 1, B = 0
     
    D1 conducts, D2 does not conducts
     
    The out voltage at Y = the voltage across the diode (D2) = 0.
  • A = 1, B = 1
     
    None of the diode conducts.
     
    The out voltage at Y = Battery voltage = 1.
Truth table for AND gate
 
A
B
Y = A. B
0
0
0
0
1
0
1
0
0
1
1
1

NOT Gate

The NOT gate has only one input and only one output. Boolean expression is 107315.png and is read as “y equals NOT A.
 
109368.png
Fig. 47
 
Realization of NOT gate The transistor is so biased that the collector voltage VCC = V (voltage corresponding to 1 state)
 
The resistors R and R1 are so chosen that if the input is low, i.e., O, the transistor is in the cut off and hence the voltage appearing at the output will be the same as applied V. Hence Y = V (or state 1).
 
109384.png
Fig. 48
 
If the input is high, the transistor current is in saturation and the net voltage at the output Y is 0 (in state 0).
 
Truth table for NOT gate
 
A
107340.png
0
1
1
0




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