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General purpose data registers



Registers of 8086: (a) data registers, (b) pointer and index registers,                      (c) segment registers,and (d) flag registers

Segment Registers


Segment registers and segment memory


Code Segment (CS) The code segment register is used for addressing a memory location in the code segment of the memory in which the program is stored for execution.


Data Segment (DS) Data segment register points to the data segment of the memory, where data is stored.

Extra Segment (ES) 
The extra segment is a segment which can be used as another data segment of the memory. Therefore, extra segment contains data.

Stack Segment (SS)
 The stack segment register is used for addressing stack segment of memory in which stack data is stored. The CPU uses the stack for temporarily storing data, i.e., the content of all general-purpose registers which will be used later.


Stack Pointer (SP) The stack pointer is used to locate the stack top address. It contains offset address. In PUSH, POP, CALL and RET instructions, the stack address is determined after adding the contents of the stack segment register (SS), after 4-bit left-shift, to the contents of SP.

Base Pointer (BP)
 The Base Pointer (BP) register can provide indirect access to data in stack. The BP may also be used for general purpose data storage.

Source index (SI) and Destination Index (DI)
 These registers are used in memory or stack address computation for general data storage. The main purpose of these registers is to store offset or displacement. The memory address computation, depend upon addressing modes, the content of Data Segment (DS) and index registers.

Instruction Pointer (IP)
 Generally, the instruction pointer register is used as a program counter. This is used for the calculation of memory addresses of instructions which will be executed. This register stores the offset for the instruction. The content of IP is automatically incremented while the execution of an instruction is going on. The address of the next instruction is computed after adding IP contents to the code segment register contents after 4 bit left-shift.

Flag Register


Carry Flag (CF) The carry flag is set to 1, if after arithmetic operation a carry is generated or a borrow is generated in subtraction. When there is no carry out, the carry flag is reset or zero. This flag can also be used in some shift and rotate instructions.

Parity Flag (PF) If the result of 8 bits operation or, lower byte of the word operation contains an even number of 1s, parity flag is set.

Flag register of 8086

Auxiliary Carry Flag (AF) 
This flag is set to 1 if there is a carry out of the lower nibble to the higher nibble of an 8-bit operation. It is used for BCD operations.

Zero Flag (ZF) The zero flag is set to 1, if the result of any arithmetic or logical operation is zero. While the result is zero, it is reset.

Sign Flag (SF) The sign flag is set to 1, if the MSB of the result is 1 after the arithmetic or logic operations. This flag represents sign number. Logic 0 indicates positive number and logic 1 is used to represent negative number.

Overflow Flag (OF) This flag is set to 1 if the signed result cannot be expressed within the number of bits in the destination operand. This flag is used to detect magnitude overflow in signed arithmetic operations. During addition operation, the flag is set when there is a carry into the MSB and the flag is reset if there is no carry out of the MSB. For subtraction operation, the flag is set when the MSB desires a borrow, and the flag is reset if there is no borrow from MSB.

Direction Flag (DF) The direction flag is used in string operations. When it is set to 1, string bytes can be accessed from memory address in decrement order, i.e., high memory address to low memory address. If it is zero, string bytes can be accessed from memory address in increasing order, i.e., low memory address to high memory address.


Interrupt Enable Flag (IF) This flag can be used as an interrupt enable or disable flag. When this flag is set, the maskable interrupt is enabled and 8086 recognise the external interrupt requests, and the CPU transfer control to an interrupt vector specified location.

Trap Flag (TF) TF is a single-step flag. When TF is set to 1, a single step interrupt occurs after the execution of each instruction and the program can be executed in single-step mode. The TF will be cleared by the single step interrupt.


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