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Instruction Set

8051 instructions are divided into following groups as given below:
  • Arithmetic instructions
  • Logical instructions
  • Data transfer instructions
  • Boolean operations instructions
  • Program control instructions
  • Branching instructions

Table: Symbol/Abbreviations of instruction set

 

Meaning Symbol/Abbreviations
addr 16 16-bit address 16-bit destination address. Used by LCALL and LJMP. A branch can be anywhere within the 64K-byte program memory address space.
addr 11 11-bit address 11-bit destination address. Used by ACALL and AJMP. The branch will be within the same 2K-byte page of program memory as the first byte of the following instruction.
#data 8-bit constant included in the instruction.
#data 16 16-bit constant included in the instruction
Rn, Ri Register R7–R0 of the currently selected register bank.
direct 8-bit internal data location’s address. This could be an Internal Data RAM location (0–127) or a SFR [i.e., I/O port, control register, status register, etc. (128–255)].
@Ri 8-bit internal data RAM location (0–255) addressed indirectly through register R1 or R0.
rel Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is –128 to +127 bytes relative to first byte of the instruction
bit Direct addressed bit in Internal Data RAM or Special Function Register.
DPTR Data pointer register
DPH, DPL DPH–Data pointer register higher, DPL—Data pointer register lower
SP SP represents 16-bit stack pointer
PC 16-bit program counter
PSW Program Status Word
CS Carry status
[  ] The content of the memory location
Move data in the direction of arrow
Exchange contents

Logical AND operation
Logical OR operation

Logical EXCLUSIVE OR
| Complement

Arithmetic Instructions

8051 Arithmetic instruction set Summary
 
Opcode Operand Functions Clock Cycle Number of bytes Instruction code
ADD A, Rn Add register to accumulator 12 1 0 0 1 0 1 r r r
ADD A, direct Add direct byte to accumulator 12 2 0 0 1 0 0 1 0 1
ADD A, @Ri Add indirect RAM to accumulator 12 1 0 0 1 0 0 1 1 i
ADD A, #data Add immediate data to accumulator 12 2 0 0 1 0 0 1 0 0
ADDC A, Rn Add register to accumulator with carry 12 1 0 0 1 1 1 r r r
ADDC A, direct Add direct byte to accumulator with carry 12 2 0 0 1 1 0 1 0 1
ADDC A, @Ri Add indirect RAM to Accumulator with carry 12 1 0 0 1 1 0 1 1 i
ADDC A, #data Add immediate data to ACC with carry 12 2 0 0 1 1 0 1 0 0
SUBB A, Rn Subtract register from ACC with borrow 12 1 1 0 0 1 1 r r r
SUBB A, direct Subtract direct byte from ACC with borrow 12 2 1 0 0 1 0 1 0 1
SUBB A, @Ri Subtract indirect RAM from ACC with borrow 12 1 1 0 0 1 0 1 1 i
SUBB A, #data Subtract immediate data from ACC with borrow 12 2 1 0 0 1 0 1 0 0
INC A Increment accumulator 12 1 0 0 0 0 0 1 0 0
INC Rn Increment register 12 1 0 0 0 0 1 r r r
INC direct Increment direct byte 12 2 0 0 0 0 0 1 0 1
INC @Ri Increment indirect RAM 12 1 0 0 0 0 0 1 1 i
INC DPTR Increment data pointer 12 1 0 0 0 0 0 0 1 1
DEC A Decrement accumulator 12 1 0 0 0 1 0 1 0 0
DEC Rn Decrement register 12 1 0 0 0 1 1 r r r
DEC direct Decrement direct byte 12 2 0 0 0 1 0 1 0 1
DEC @Ri Decrement indirect RAM 12 1 0 0 0 1 0 1 1 i
MUL AB Multiply A and B 48 1 1 0 1 0 0 1 0 0
DIV AB Divide A by B 48 1 1 0 0 0 0 1 0 0
DAA   Decimal adjust accumulator 12 1 1 1 0 1 0 1 0 0

Logical Instruction

Table : 8051 Logical instruction set summary
 

Opcode Operand Functions Clock Cycle Number of bytes Instruction code
ANL A, Rn AND register to accumulator 12 1 0 1 0 1 1 r r r
ANL A, direct AND direct byte to accumulator 12 2 0 1 0 1 0 1 0 1
ANL A,@Ri AND indirect RAM to accumulator 12 1 0 1 0 1 0 1 1 i
ANL A,#data AND immediate data to accumulator 12 2 0 1 0 1 0 1 0 0
ANL direct, A AND accumulator to direct byte 12 2 0 1 0 1 0 0 1 0
ANL direct, #data AND immediate data to direct byte 24 3 0 1 0 1 0 0 1 1
ORL A, Rn OR register to accumulator 12 1 0 1 0 0 1 r r r
ORL A, direct OR direct byte to accumulator 12 2 0 1 0 0 0 1 0 1
ORL A, @ Ri OR indirect RAM to accumulator 12 1 0 1 0 0 0 1 1 i
ORL A, #data OR immediate data to accumulator 12 2 0 1 0 0 0 1 0 0
ORL direct ,A OR accumulator to direct byte 12 2 0 1 0 0 0 0 1 0
ORL direct, #data OR immediate data to direct byte 24 3 0 1 0 0 0 0 1 1
XRL A, Rn Exclusive-OR register to accumulator 12 1 0 1 1 0 1 r r r
XRL A, direct Exclusive-OR direct byte to accumulator 12 2 0 1 1 0 0 1 0 1
XRL A, @ Ri Exclusive-OR indirect RAM to accumulator 12 1 0 1 1 0 0 1 1 i
XRL A, # data Exclusive-OR immediate data to accumulator 12 2 0 1 1 0 0 1 0 0
XRL direct,A Exclusive-OR accumulator to direct byte 12 2 0 1 1 0 0 0 1 0
XRL direct, #data Exclusive-OR immediate data to direct byte 24 3 0 1 1 0 0 0 1 1
CLR A Clear accumulator 12 1 1 1 1 0 0 1 0 0
CPL A Complement accumulator 12 1 1 1 1 1 0 1 0 0
RL A Rotate accumulator left 12 1 0 0 1 0 0 0 1 1
RLC A Rotate accumulator left through the carry 12 1 0 0 1 1 0 0 1 1
RR A Rotate accumulator right 12 1 0 0 0 0 0 0 1 1
RRC A Rotate accumulator right through the carry 12 1 0 0 0 1 0 0 1 1
SWAP A Swap nibbles within the accumulator 12 1 1 1 0 0 0 1 0 0

Data Transfer Instruction

Table: 8051 Data-transfer instructions set summary
 
Opcode Operand Functions Clock Cycle Number of bytes Instruction code
MOV A, Rn Move register to accumulator 12 1 1 1 1 0 1 r r r
MOV A, direct Move direct byte to accumulator 12 2 1 1 1 0 0 1 0 1
MOV A, @Ri Move indirect RAM to accumulator 12 1 1 1 1 0 0 1 1 i
MOV A, #data Move immediate data to accumulator 12 2 0 1 1 1 0 1 0 0
MOV Rn, A Move accumulator to register 12 1 1 1 1 1 1 r r r
MOV Rn, direct Move direct byte to register 24 2 1 0 1 0 1 r r r
MOV Rn, #data Move immediate data to register 12 2 0 1 1 1 1 r r r
MOV direct, A Move accumulator to direct byte 12 2 1 1 1 1 0 1 0 1
MOV direct, Rn Move register to direct byte 24 2 1 0 0 0 1 r r r
MOV direct, direct Move direct byte to direct 24 3 1 0 0 0 0 1 0 1
MOV direct, @Ri Move indirect RAM to direct byte 24 2 1 0 0 0 0 1 1 i
MOV direct, #data Move immediate data to direct byte 24 3 0 1 1 1 0 1 0 1
MOV @Ri, A Move accumulator to indirect RAM 12 1 1 1 1 1 0 1 1 i
MOV @Ri, direct Move direct byte to indirect RAM 24 2 1 0 1 0 0 1 1 i
MOV @Ri, #data Move immediate data to indirect RAM 12 2 0 1 1 1 0 1 1 i
MOV DPTR, #data16 Load data pointer with a 16-bit constant 24 3 1 0 0 1 0 0 0 0
MOVC A,@A Move code byte relative to 24 1 1 0 0 1 0 0 1 1
MOVC A,@A+PC Move code byte relative to PC to ACC 24 1 1 0 0 0 0 0 1 1
MOVX A, @Ri Move external RAM (8-bit addr) to ACC 24 1 1 1 1 0 0 0 1 i
MOVX A,@ Move external RAM (16-bit addr) to ACC 24 1 1 1 1 0 0 0 0 0
MOVX @Ri, A Move ACC to external RAM (8-bit addr) 24 1 1 1 1 1 0 0 1 i
MOVX @DPTR, A Move ACC to external RAM (16-bit addr) 24 1 1 1 1 1 0 0 0 0

Boolean Variable Manipulation

Table: 8051 Boolean instruction set summary
 
Opcode Operand Functions Clock Cycle Number of bytes Instruction code
CLR C Clear carry 12 1 1 1 0 0 0 0 1 1
CLR bit Clear direct bit 12 2 1 1 0 0 0 0 1 0
SETB C Set carry 12 1 1 1 0 1 0 0 1 1
SETB bit Set direct bit 12 2 1 1 0 1 0 0 1 0
CPL C Complement carry 12 1 1 0 1 1 0 0 1 1
CPL bit Complement direct bit 12 2 1 0 1 1 0 0 1 0
ANL C, bit AND direct bit to carry 24 2 1 0 0 0 0 0 1 0
ANL C,/bit AND complement of direct bit to carry 24 2 1 0 1 1 0 0 0 0
ORL C, bit OR direct bit to carry 24 2 0 1 1 1 0 0 1 0
ORL C,/bit OR complement of direct bit to carry 24 2 1 0 1 0 0 0 0 0
MOV C,bit Move direct bit to carry 12 2 1 0 1 0 0 0 1 0
MOV bit,C Move carry to direct bit 24 2 1 0 0 1 0 0 1 0
JC rel Jump if carry is set 24 2 0 1 0 0 0 0 0 0
JNC rel Jump if carry is not set 24 2 0 1 0 1 0 0 0 0
JB Bit, rel Jump if direct bit is set 24 3 0 0 1 0 0 0 0 0
JNB Bit,rel Jump if direct bit is not set 24 3 0 0 1 1 0 0 0 0
JBC bit,rel Jump if direct bit is set and clear bit 24 3 0 0 0 1 0 0 0 0

Branch Group

Table: 8051 Branch group instructions set summary
 
Opcode Operand Functions Clock Cycle Number of bytes Instruction code
ACALL addr11 Absolute subroutine call 24 2 a10 a9 a8 1 0 0 0 1
LCALL addr16 Long subroutine call 24 3 0 0 0 1 0 0 1 0
RET   Return from subroutine 24 1 0 0 1 0 0 0 1 0
RETI   Return from interrupt 24 1 0 0 1 1 0 0 1 0
AJMP addr11 Absolute jump 24 2 a10 a9 a8 0 0 0 0 1
LJMP addr16 Long jump 24 3 0 0 0 0 0 0 1 0
SJMP rel Short jump (relative addr) 24 2 1 0 0 0 0 0 0 0
JMP @A+ DPTR Jump indirect relative to the DPTR 24 1 0 1 1 1 0 0 1 1
JZ rel Jump if accumulator is zero 24 2 0 1 1 0 0 0 0 0
JNZ rel Jump if accumulator is not zero 24 2 0 1 1 1 0 0 0 0
CJNE A, direct, rel Compare direct byte to ACC and jump if not equal 24 3 1 0 1 1 0 1 0 1
CJNE A, #data, rel Compare immediate to ACC 24 and jump if not equal 3 1 0 1 1 0 1 0 0  
CJNE RN, #data, rel Compare immediate to register and jump if not equal 24 3 1 0 1 1 1 r r r
CJNE @Ri, # data, rel Compare immediate to indirect and jump if not equal 24 3 1 0 1 1 0 1 1 i
DJNZ Rn, rel Decrement register and jump if not zero 24 2 1 1 0 1 1 r r r
DJNZ direct,rel Decrement direct byte and and jump if not zero 24 3 1 1 0 1 0 1 0 1
NOP   No operation 12 1 0 0 0 0 0 0 0 0

 

Table: 8051 12 PUSH, POP and Exchange instructions set summary
 
Opcode Operand Functions Clock Cycle Number of bytes Instruction code
PUSH direct Push direct byte onto stack 24 2 1 1 0 0 0 0 0 0
POP direct Pop direct byte from stack 24 2 1 1 0 1 0 0 0 0
XCH A, Rn Exchange register with accumulator 12 1 1 1 0 0 1 r r r
XCH A, direct Exchange direct byte with accumulator 12 2 1 1 0 0 0 1 0 1
XCH A, @ Ri Exchange indirect RAM with accumulator 12 1 1 1 0 0 0 1 1 i
XCHD A, @ Ri Exchange low-order digit indirect RAM wit hACC 12 1 1 1 0 1 0 1 1 i





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