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Data Transfer Instructions

MOV Rd,Rs (Move the content of the source register to the destination register)

Rd←Rs,


MOV M, Rs
 (Move the content of the source register to the memory)

[M]Rs,


MOV Rd, M
 (Move the content of the memory to the destination register)

Rd[M],


MVI Rd, data
 (Move immediate 8-bit data to the register)

Rddata,


MVI M, data
 (Move immediate data to memory)

[M]data,


LDA 16-bit address
 (Load Accumulator direct)

A[16-bit Address].


LDAX B/D Register
pair (Load Accumulator Indirect)

A[BC] or A[DE]


LXI Register pair, 16-bit data
 (Load register pair immediate)

Register pair 16 bits data, Rh8 MSBs, Rl8 LSBs of data.


LHLD 16-bit address
 (Load H and L registers direct)

L [address], H[address+1].


STA 16-bit address
 (Store accumulator direct)

16-bit Address A,


SHLD 16-bit address
 (Store H and L pair registers direct)

[address]L, [address +1][H].


XCHG
 (Exchange the contents of H and L with D and E)

H↔D, LE

Table: 8085 Data-transfer instructions set summary
 

 

Arithmetic Instructions

 

ADD R (Add register to accumulator)

AA + R,


ADD M
 (Add memory to accumulator)

AA+ [M],


ADC R
 (Add register to accumulator with carry)

AA + R+CS,


ADC M
 (Add register to accumulator with carry)

AA + M+CS,


ADI 8-bit data
 (Add immediate 8-bit data to accumulator)

AA + data,


ACI 8-bit data
 (Add immediate 8-bit data to accumulator with carry)

AA + data + CS,


DAD Register
pair (Add register pair to H and L registers)

H–LH–L + Register pair.


SUB R
 (Subtract register from accumulator)

AA – R,


SUB M
 (Subtract memory from accumulator)

AA – [M]


SBB R
 (Subtract register from accumulator with borrow)

AA – R – CS.


SBB M
 (Subtract memory and borrow from accumulator)

AA – [M] – CS.


SUI 8-bit data
 (Subtract immediate 8-bit data from accumulator)

AA – 8-bit data.


SBI 8-bit data
 (Subtract immediate 8 bit data from accumulator with borrow)

AA – 8-bit data -CS.


INR R
 (Increment register by 1)

RR + 1


INR M
 (Increment memory by 1)

[M][M] +1


INX RP
 (Increment register pair)

RPRP+1

DCR R (Decrement register bt 1)

R←R-1


DCR M
 (Decrement memory by 1)

[M][M] – 1


DCX RP
 (Decrement register pair by 1)

RPRP-1,


DAA 
(Decimal adjust accumulator)

Machine cycles: 1, States: 4, Flags: all, one byte instruction

 

Table: 8085 arithmetic instruction set summary
 


 

 

Logical Instructions

CMP R (Compare register with accumulator)
A – R.
 
CMP M (Compare memory with accumulator)
A – [M]
 
CPI 8 - bit data (Compare immediate 8 bit data with accumulator)
A – 8-bit data.
 
ANA R (Logical AND register with accumulator)
AA  R
 
ANA M (Logical AND memory with accumulator)
AA  [M].
 
ANI 8-bit data (Logical AND immediate 8-bit data with accumulator)
AA  8-bit data
 
ORA R (Logical OR register with accumulator)
AA ∨ R
 
ORA M (Logical OR memory with accumulator)
AA ∨ [M].
 
ORI 8-bit data (Logical OR immediate 8-bit data with accumulator)
AA ∨ 8-bit data.
 
XRA R (EXCLUSIVE-OR register with accumulator)
AA⊕R
 
XRA M (EXCLUSIVE – OR memory with accumulator)
AA[M]
 
XRI 8-bit data (EXCLUSIVE - OR immediate 8-bit data with accumulator)
AAdata
 
RLC (Rotate accumulator left)
An+1An, A0A7, CSA7
 
RRC (Rotate accumulator right)
A7A0, CS A0, AnAn+1
 
RAL (Rotate accumulator left through carry)
An+1An, CSA7, A0CS
 
RAR (Rotate accumulator right through carry)
An An+1, CSA0, A7CS
 
CMA (Complement the accumulator)
A A 
 
CMC (Complement the carry)
CSCS  Machine cycles: 1, States: 4, Flags: CS, One-byte instruction
 
STC (Set the carry)
CS1 Machine cycles: 1, States: 4, Flags: CS, One-byte instruction
 

Table : 8085 logical instruction set summary

 

 

Branch Group

JMP 16-bit address (Jump Unconditionally)

PC←Label (16-bit address)


Conditional Jump 16-bit address
 (Jump Conditionally)

In the conditional jump instruction, the program sequence is transferred to the memory location specified by the 16-bit address given in the operand based on the specified flag of the PSW. All conditional jump instructions are given below:


JC 16-bit address
 (Jump on carry)

PC16-bit address, jump if CY = 0.


JNC 16-bit address
 (Jump on no carry)

PC16-bit address, jump if CY = 0.


JP 16-bit address
 (Jump on positive)

PC16-bit address, jump is S = 0.


JM 16-bit address
 (Jump on minus)

PC16-bit address jump if S = 1.


JZ 16-bit address
 (Jump on zero)

PC16-bit address jump if Z=1.


JNZ 16-bit address
 (Jump on no zero)

PC16-bit address jump if CS = 1.


JPE 16-bit address
 (Jump on even parity)

PC16-bit address (jump if even parity)


JPO 16-bit address
 (Jump on odd parity)

PC16-bit address; the parity status P = 0,


CALL 16-bit address
 (Unconditional subroutine CALL)

([SP] – 1) PCH , ([SP]-2)PCL,

[SP][SP]-2, PC16 bit address


CALL 16-bit address
 (CALL Conditionally)

([SP] – 1)PCH , ([SP]-2)PCL,

[SP][SP]-2, PC16 bit address
 

RET (Return from subroutine unconditionally)

PCL[SP]

PCH[SP]+1

[SP][SP]+2


Conditional Return
 (Return from subroutine conditionally)

PCL [SP]

PCH [SP]+1

[SP] [SP]+2

 

PCHL ( Load program counter with H–L contents)

PCH–L, PCH H, PCL L


RST 0-7
 (Restart)

[SP] – 1 PCH, [SP] – 2PCL

[SP] [SP] – 2], [PC] 8 times n

 

Interrupt Instructions

The 8085 microprocessor had four additional interrupts. The interrupt instructions and their restart addresses are


 

Table: 8085 JUMP instruction set summary


Table: 8085 CALL and Return instruction set summary

 

Stack/PUSH and POP Instructions

PUSH B (Push the content of register pair B and C to stack)
[SP] – 1B
[SP] –2C,
[SP][SP] –2
 
PUSH D (Push the content of register pair D and E to stack)
[SP] – 1D
[SP] –2  E,
[SP][SP] –2
 
PUSH H (Push the content of register pair H and L to stack)
[SP] – 1H
[SP] –2L
[SP][SP] –2
 
PUSH PSW (PUSH accumulator content and flags on stack)
[SP] – 1 A
[SP]– 2PSW (Program Status Word)
[SP] [SP] –2
 
POP B (Pop off stack to register pair B and C)
C[SP]
B[SP] +1
[SP] [SP] +2
 
POP D (Pop off stack to register pair D and E)
E[SP]
D[SP] + 1
[SP] [SP] + 2

POP H (Pop off stack to register pair H and L)
L[SP]
H[SP] +1
[SP][SP] +2
 
POP PSW (Pop off stack to accumulator and flags)
PSW[SP]
A[SP]+1
[SP][SP]+2
 
XTHL (Exchange H and L with top of stack)
L→[SP]
H↔[SP]+1
 
SPHL (Copy the contents of H–L register pair to the stack pointer)
[H–L][SP].


Table: 8085 Stack/PUSH and POP instruction set summary

I/O and Machine Control Instructions

Table: 8085 I/O and machine control instructions set summary


 





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