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Introduction to DMA


DMA operation


The DMA operation can be carried out by the following sequence as given below:

  • Initially the device, which requires data transfer between the device and the memory, should send the DMA request (DRQ) to the DMA controller.
  • The DMA controller sends a Hold Request (HRQ) line to the CPU and waits for the CPU to assert the HLDA.
  • Then microprocessor tri-states all the address bus, data bus and control bus. The CPU relinquishes the control of the bus and acknowledges the Hold input signal through Hold Acknowledge (HLDA) output signal. The CPU remains in the HOLD state; the DMA controller becomes the master of bus. Actually, DMA controller circuit manage the switching of address, data and control buses between CPU, memory, and I/O devices.
  • The HLDA signal is fed to the DMA controller. When the DMA controller receive the HLDA signal, the DMA controller takes care of direct data transfer operation between memory and I/O devices. The DMA controller sends DACK signal to the peripheral device, which requested for DMA operation.
  • Then DMA operation can be performed by sending a proper address to the memory and required control signals to transfer a bank of data. 

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